{"id":16132,"date":"2024-03-09T14:48:18","date_gmt":"2024-03-09T14:48:18","guid":{"rendered":"https:\/\/lapzinvn.com\/restech\/index.php\/product\/camera-link-interface\/"},"modified":"2024-03-13T11:54:10","modified_gmt":"2024-03-13T11:54:10","slug":"camera-link-interface","status":"publish","type":"product","link":"https:\/\/anaxi-technologies.hk\/index.php\/product\/camera-link-interface\/","title":{"rendered":"Camera Link Interface"},"content":{"rendered":"<div id=\"tab-description2\" class=\"woocommerce-Tabs-panel2 woocommerce-Tabs-panel2--description2 panel entry-content2 wc-tab2\" role=\"tabpanel2\" aria-labelledby=\"tab-title-description2\">\n<p><strong>General Description<\/strong><\/p>\n<p>Camera Link\u00ae interface that supports the BASE, MEDIUM and FULL configurations. Implements both the Camera link receiver (frame-grabber) and Camera link transmitter (camera) interfaces. Directly compatible with the original National Semiconductor Corp. specifications.<\/p>\n<p><strong>Key Design Features<\/strong><\/p>\n<p>\u2013 Separate Camera Link\u00ae Tx\/Rx pair<br \/>\n\u2013 Support for BASE, MEDIUM and FULL configurations<br \/>\n\u2013 Error checking for data misalignment at the receiver<br \/>\n\u2013 Data rates of up to 500 Mbits\/s per lane on basic FPGAs and SoCs<br \/>\n\u2013 Uses the standard LVDS I\/O resources available most FPGA and SoC devices<br \/>\n\u2013 Compatibility and\/or replacement for a wide range of commercial SERDES LVDS ICs<br \/>\n\u2013 Examples include: SN65LVDS*, SN75LVDS*, DS90CR*, DS90UR* and THC63LVD* series ICs<\/p>\n<p><strong>Applications<\/strong><\/p>\n<p>\u2013 Real-time \/ low-latency video interfaces on low-cost devices<br \/>\n\u2013 Implementation of \u2018virtual\u2019 ribbon cable<br \/>\n\u2013 Data streaming interfaces over cable or twisted pair<br \/>\n\u2013 General purpose LVDS \/ SERDES applications<\/p>\n<p>&nbsp;<\/p>\n<\/div>\n","protected":false},"excerpt":{"rendered":"<p>General Description Camera Link\u00ae interface that supports the BASE, MEDIUM and FULL configurations. Implements both the Camera link receiver (frame-grabber)<\/p>\n","protected":false},"featured_media":16169,"comment_status":"closed","ping_status":"closed","template":"","meta":[],"product_cat":[81],"product_tag":[],"class_list":["post-16132","product","type-product","status-publish","has-post-thumbnail","product_cat-fpga-board-and-kits","first","instock","shipping-taxable","product-type-simple"],"_links":{"self":[{"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/product\/16132","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/types\/product"}],"replies":[{"embeddable":true,"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/comments?post=16132"}],"version-history":[{"count":2,"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/product\/16132\/revisions"}],"predecessor-version":[{"id":17287,"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/product\/16132\/revisions\/17287"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/media\/16169"}],"wp:attachment":[{"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/media?parent=16132"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/product_cat?post=16132"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/product_tag?post=16132"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}