{"id":16138,"date":"2024-03-09T14:48:42","date_gmt":"2024-03-09T14:48:42","guid":{"rendered":"https:\/\/lapzinvn.com\/restech\/index.php\/product\/8b-10b-encoder-decoder\/"},"modified":"2024-03-13T11:52:21","modified_gmt":"2024-03-13T11:52:21","slug":"8b-10b-encoder-decoder","status":"publish","type":"product","link":"https:\/\/anaxi-technologies.hk\/index.php\/product\/8b-10b-encoder-decoder\/","title":{"rendered":"8b\/10b Encoder\/Decoder"},"content":{"rendered":"<div id=\"tab-description2\" class=\"woocommerce-Tabs-panel2 woocommerce-Tabs-panel2--description2 panel entry-content2 wc-tab2\" role=\"tabpanel2\" aria-labelledby=\"tab-title-description2\">\n<p><strong>General Description<\/strong><\/p>\n<p>Encoder\/Decoder pair that implements the standard IBM\u00ae 8b\/10b line code for a DC-balanced serial data stream. The 8b\/10b code is a common encoding scheme used for the transmission of serial AC-coupled data with embedded clock over larger distances.<\/p>\n<p><strong>Key Design Features<\/strong><\/p>\n<p>\u2013 Supports the standard IBM\u00ae 8b\/10b line code for a DC-balanced serial data stream<br \/>\n\u2013 Supports all standard control symbols \u2013 K.28.0 to K.30.7<br \/>\n\u2013 Separate encoder and decoder pair<br \/>\n\u2013 Fully synchronous design with data input and output valid flags<br \/>\n\u2013 Generic parallel input and output data widths<br \/>\n\u2013 Error flags indicate control symbol errors and general decoding errors<br \/>\n\u2013 Running disparity calculations handled internally and provided as an output port<br \/>\n\u2013 Fully scalable architecture<br \/>\n\u2013 Suitable for use in serial data links of 6 GHz+ on basic FPGA devices<\/p>\n<p><strong>Applications<\/strong><\/p>\n<p>\u2013 High speed serial interfaces with embedded clocking<br \/>\n\u2013 DC-balanced, AC-coupled serial interfaces<br \/>\n\u2013 Prerequisite for the transmission of serial data over large distances<br \/>\n\u2013 Encoding scheme used in a wide range of communication standards<br \/>\n\u2013 Examples include: Ethernet, PCI Express, DVB-ASI, Digital audio, Fibre Channel etc.<\/p>\n<p>&nbsp;<\/p>\n<\/div>\n","protected":false},"excerpt":{"rendered":"<p>General Description Encoder\/Decoder pair that implements the standard IBM\u00ae 8b\/10b line code for a DC-balanced serial data stream. The 8b\/10b<\/p>\n","protected":false},"featured_media":16169,"comment_status":"closed","ping_status":"closed","template":"","meta":[],"product_cat":[81],"product_tag":[],"class_list":["post-16138","product","type-product","status-publish","has-post-thumbnail","product_cat-fpga-board-and-kits","first","instock","shipping-taxable","product-type-simple"],"_links":{"self":[{"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/product\/16138","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/types\/product"}],"replies":[{"embeddable":true,"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/comments?post=16138"}],"version-history":[{"count":2,"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/product\/16138\/revisions"}],"predecessor-version":[{"id":17286,"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/product\/16138\/revisions\/17286"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/media\/16169"}],"wp:attachment":[{"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/media?parent=16138"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/product_cat?post=16138"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/anaxi-technologies.hk\/index.php\/wp-json\/wp\/v2\/product_tag?post=16138"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}